TMS320DM642AZDK5

Product Summary

The TMS320DM642AZDK5 is a Video/Imaging Fixed-Point Digital Signal Processor. It uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The TMS320DM642AZDK5 has three configurable video port peripherals (VP0, VP1, and VP2).

Parametrics

TMS320DM642AZDK5 absolute maximum ratings: (1)Supply voltage range CVDD: –0.3 V to 1.8 V; (2)Supply voltage range DVDD: –0.3 V to 4 V; (3)Input voltage range(except PCI), VI: –0.3 V to 4 V; (4)Input voltage range(PCI), VIP: –0.5 V to DVDD + 0.5 V; (5)Output voltage range(except PCI), VO: –0.3 V to 4 V; (6)Output voltage range (PCI), VOP: –0.5 V to DVDD + 0.5 V; (7)Operating case temperature range TC(default): 0℃ to 90℃; (8)Operating case temperature range TC(A version) [A-500, A-600]: –40℃ to 105℃; (9)Storage temperature range, Tstg: –65℃ to 150℃; (10)Package Temperature Cycling Temperature Range: –40℃ to 125℃; (11)Package Temperature Cycling Number of Cycles: 500; (12)IIP Input leakage current (PCI) 0 < VIP < DVDD = 3.3 V: ±10 uA; (13)IOH High-level output current EMIF, CLKOUT4, CLKOUT6, EMUx: –16 mA; (14)Ci Input capacitance: 10 pF; (15)Co Output capacitance: 10 pF.

Features

TMS320DM642AZDK5 features: (1)High-Performance Digital Media Processor; (2)Eight Highly Independent Functional Units With VelociTI.2 Extensions; (3)Load-Store Architecture With Non-Aligned Support; (4)64 32-Bit General-Purpose Registers; (5)Instruction Packing Reduces Code Size; (6)All Instructions Conditional; (7)Byte-Addressable (8-/16-/32-/64-Bit Data); (8)8-Bit Overflow Protection; (9)Bit-Field Extract, Set, Clear; (10)Normalization, Saturation, Bit-Counting; (11)VelociTI.2 Increased Orthogonality; (12)Endianess: Little Endian, Big Endian; (13)64-Bit External Memory Interface; (14)Enhanced Direct-Memory-Access Controller; (15)10/100 Mb/s Ethernet MAC; (16)Management Data Input/Output (MDIO); (17)VCXO Interpolated Control Port (VIC); (18)Host-Port Interface (HPI) [32-/16-Bit]; (19)Inter-Integrated Circuit (I2C Bus); (20)Two Multichannel Buffered Serial Ports; (21)Three 32-Bit General-Purpose Timers; (22)Sixteen General-Purpose I/O (GPIO) Pins; (23)Flexible PLL Clock Generator; (24)IEEE-1149.1 (JTAG) Boundary-Scan-Compatible.

Diagrams